ABB GDB021BE GDBO21BE01 HIEE300766R0001 電源板
當(dāng)晶體管基極為高電平時，晶體管飽和導(dǎo)通，等效電路如圖3所示，此時電感L儲存能量，電容C充電。當(dāng)晶體管基極為低電平時，晶體管截止，等效電路如圖4所示，此時電感L釋放能量，電容C放電。通常我們的PCB板上還有采樣電路反饋電路，以此來調(diào)節(jié)基極控制電壓的占空比，來達(dá)到穩(wěn)壓的目的，同時，由于負(fù)載和晶體管串聯(lián)，輸出電壓小于輸入電壓，所以又叫降壓開關(guān)電路(buck開關(guān)電路)。對應(yīng)的并聯(lián)開關(guān)電路原理相似，同時由于晶體管并聯(lián)，電感產(chǎn)生的感應(yīng)電動勢與電壓相疊加后作用于負(fù)載，所以輸出電壓會高于輸入電壓

GDB021BE

GDB021BE

ABB GDB021BE GDBO21BE01 HIEE300766R0001 Power module
When the transistor base is high current level, the transistor is saturated and on, and the equivalent circuit is shown in Figure 3. At this time, the inductor L stores energy and the capacitor C charges. When the transistor base is at low current level, the transistor is cut off, and the equivalent circuit is shown in Figure 4. At this time, the inductor L releases energy and the capacitor C discharges. Usually our PCB board also has a sampling circuit feedback circuit, in order to adjust the duty cycle of the base control voltage, to achieve the purpose of voltage regulation, at the same time, because the load and the transistor in series, the output voltage is less than the input voltage, so it is also called buck switching circuit (buck switching circuit). The principle of the corresponding parallel switching circuit is similar, and because the transistors are in parallel, the induced electromotive force generated by the inductor acts on the load after superimposed with the voltage, so the output voltage will be higher than the input voltage
Description
Based on the rules given above, GDB021BE outputs the FlexLogic “equation for relay 2 as shown above. On the left is a bunch of boxes showing FlexLogic messages for output relay 2. To the right of a stack of boxes is an illustration of how to explain this equation. In this example, the inputs for the four-input OR gate are the percent Diff OP, the Inst Diff OP, the output of the XOR gate, and the output of the AND gate. GDB021BE dual input with gate input is gdb021be non-gate output and output relay 2. The input for the “Not” gate is logical input 2. The inputs for a two-input XOR gate are virtual output 1 and logical nput 1. For all these doors, the input precedes the door itself.

GDB021BE